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Journal Paper

  • Chia-Yu Lin and Mong-Kai Ku, ¡§Early Detection of successful decoding for dual-diagonal block-based LDPC codes¡¨, Electronics Letters, 6 November 2008, Vol 44, Issue 23, p. 1368-1370 (SCI IF:1.009 Rank: 86/227).
  • A.Y. Kwentus, P. Pai, S. Jaffe, R. Gomez, S. Tsai, T. Kwan, Hing-Tsun Hung, Y.J. Shin, V. Hue, D. Cheung, R.A. Khan, C.M. Ward, Mong-Kai Ku, K. Choi, J. Searle, K. Bult, K. Cameron, J. Demas, C. Reames, and H. Samueli, "A single-chip universal digital satellite receiver with 480-MHz IF input," IEEE Journal of Solid-State Circuits, vol.34, no.11, pp.1634-1646, Nov. 1999.
  • A. Rofougaran, G. Chang, J. J. Rael, J. Y. C. Chang, M. Rofougaran, P. J. Chang, M. Djafari, M. K. Ku, E. W. Roth, A. Abidi, and H. Samueli, "A single-chip 900-MHz spread-spectrum wireless transceiver in 1 um CMOS¡XPart I: Architecture and transmitter design,¡¨ IEEE J. Solid-State Circuits, vol. 33, no. 4, pp. 515¡V534, Apr. 1998.


International Conference paper

  • Chia-Yu Lin and Mong-Kai Ku, ¡§Node Operation Reduced Decoding For LDPC Codes,¡¨ to appear in IEEE International Symposium on Circuits and Systems (ISCAS 2009), Tainan, Taiwan, May 2009.
  • Chia-Yu Lin, Chih-Chun Wei, and Mong-Kai Ku, "Efficient Encoding for Dual-Diagonal Structured LDPC Codes Based on Parity Bit Prediction and Correction," in Proc. IEEE Asia Pacific Conference on Circuits and Systems (APCCAS 2008), Macao, China, Nov.-Dec. 2008.
  • Kuo-Hsing Juan, Mong-Kai Ku, and Yu-min Chang, "A Fast Converging High Throughput LDPC Decoder FPGA Implementation", in Proc. IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2008), Rhodes Island, Greece, Oct. 2008.
  • Chih-Yuan Yang and Mong-Kai Ku, "LDPC coded OFDM modulation for high spectral efficiency transmission," in Proc. 4th European Conference on Circuits and Systems for Communications (ECCSC 2008), pp.280-284, July 2008.
  • Shu-Cheng Chou, Mong-Kai Ku, and Chia-Yu Lin, "Switching Activity Reducing Layered Decoding Algorithm for LDPC Codes," IEEE International Symposium on Circuits and Systems (ISCAS 2008), pp.528-531, Seattle, USA, May 2008.
  • Chia-Yu Lin, Mong-Kai Ku, and Yi-Hsing Chien, "Long Length LDPC Code Construction and the Corresponding Decoder Implementation with Adjustable Parallelism," in Proc. IEEE Vehicular Technology Conference (VTC Spring 2008), pp.1423-1427, Singapore, May 2008.
  • Shao-Yi Chien, Chi-Sheng Shih, Mong-Kai Ku, Chia-Lin Yang, Yao-Wen Chang, Tei-Wei Kuo, and Liang-Gee Chen, "3D Video Applications and Intelligent Video Surveillance Camera and its VLSI Design," in Proc. IEEE International Conference on Multimedia and Expo (ICME 2007), pp.9-9, July 2007.
  • Tzu-Hsiang Lo, Mong-Kai Ku, and Chia-Yu Lin, "A Design of Two-Stage Hybrid ARQ Scheme using LDPC Codes", in Proc. IASTED International Conference on Wireless and Optical Communications (WOC 2007), Montreal, Canada, May 2007.
  • Huan-Sheng Li, Mong-Kai Ku, and Chia-Yu Lin, "GA-based Low-Density Parity-Check Code Search Algorithm," in Proc. IASTED International Conference on Wireless and Optical Communications (WOC 2007), Montreal, Canada, May 2007.
  • Yi-Hsing Chien, Mong-Kai Ku, "A High Throughput H-QC LDPC Decoder," in International Symposium of Circuit and Systems (ISCAS), New Orlean, U.S.A, May27-30, 2007.
  • Chih-Yuan Yang and Mong-Kai Ku, "LDPC coded OFDM modulation for high spectral efficiency transmission", in proc. 3rd International Conference on Circuits and Systems for Communications (ICCSC 06), pp. 243-247, Bucharest, Romania , July, 2006.
  • Chi-Sheng Shih, Chia-Lin Yang, Mong-Kai Ku, Tei-Wei Kuo, Shao-Yi Chien, Yao-Wen Chang, and Liang-Gee Chen, 2005, "Reconfigurable Platform for Context Science Research," the 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), Hong Kong, August 17-19, 2005.
  • Luke Yan-Xun Lee and Mong-kai Ku, "Hardware/Software Interface Synthesis for a Codesign Framework," in proc. 2005 Asia and South Pacific International Conference on Embedded SoCs (ASPICES 2005), Bangalore, India, July 2005.
  • Mong-Kai Ku, Yi-hsing Chien, Huan-Sheng Li, "Code Design and Decoder Implementation of Low Density Parity Check Code," in proc. of 2005 Emerging Information Technology Conference (EITC 2005), Taipei, Taiwan, August 2005.

Local conference paper

  • Shu-Cheng Chou, Mong-Kai Ku, Chia-Yu Lin, and Yi-Hsing Chien, "Layered LDPC Decoder with Switching Activity Reduction," in Proc. 19th VLSI Design/CAD Symposium, Kenting, Taiwan, Aug. 2008.
  • Chia-Yu Lin, Chih-Chun Wei, and Mong-Kai Ku, "Parity-Prediction Based Encoder for Dual-Diagonal LDPC Codes," in Proc. 19th VLSI Design/CAD Symposium, Kenting, Taiwan, Aug. 2008.
  • Kuo-Hsing Juan, Mong-Kai Ku, and Yu-Min Chang, "Configurable Hierarchical Decoder Architectures for H-QC LDPC Codes," in proc. 18th VLSI Design/CAD symposium, Hua-Lien, Taiwan, Aug. 2007.
  • Ya-Cheng Wang, Mong-Kai Ku, "DESIGN AND IMPLEMENTATION OF OFDM TRANSMITTER WITH LOW PEAK-TO-AVERAGE POWER RATIO," in proc. 16th VLSI Design/CAD symposium, Hua-Lien, Taiwan, August 2005.
  • Yi-Hsing Chien and Mong-Kai Ku, "SCALABLE HIGH HARDWARE UTILIZATION EFFICIENCY LDPC DECODER," in proc. 16th VLSI Design/CAD symposium, Hua-Lien, Taiwan, August 2005.