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NTU CSIE 2003/2 - present Assistant Professor Broadcom Corporation 1993/10 - 2002/11 Fixed Wireless VOFDM Chip Adaptive Beamformer and FEC Performed system simulation for the adaptive beamformer and Receiver / Transmitter Forward Error Correction Circuit. Led the design team for implementation and verification of RTL design. Digital Satellite TV Chip Viterbi Decoder Performed system simulation and designed the architecture for the 100 Mb/s punctured Viterbi decoder. Implemented RTL design and physical layout of the Viterbi decoder. Cable Modem Head-end Burst Receiver Chip Performed system simulation on FEC and SCDMA receiver. Satellite TV Receiver Chip DSNG TCM Decoder Designed Architecture, system and RTL for the TCM decoder. Performed system wordlength and traceback depth trade-off study. Designed the FEC synchronization algorithm. Implemented TCM decoder in RTL. VDSL Chip Tomlinson precoder Architected the Tomlinson precoder and carried out the RTL implementation. Digital Satellite Receiver Chip System Qualification Qualified the satellite chip to meet the fault coverage and production yield requirement. Cable TV Receiver Chip TCM Decoder Performed physical layout, cell library design and functional verification. Digital Satellite Radio Receiver Chip Designed and implemented the timing recovery loop and performed chip
functional verification. |