Computer Organization and Assembly Languages

Computer Organization and Assembly Languages, Fall 2006

Forum

History of Intel CPUs^*

1978	8086	16-bit processor, up to 1MB RAM, available in 5,6,8 and 10 MHz, 29K transistors.
1979	8088	chosen for the first IBM PC.
1982	80286	up to 16MB RAM, up to 20 MHz, 134K transistors, virtual memory and protected mode.
1985	80386	32-bit processor, up to 4GB RAM, up to 33 MHz, 275K transistors, instruction pipelining.
1989	80486	1.2M transistors, integrated FPU, 8KB on-chip cache.
1993	Pentium	up to 200MHz, two 8K caches.
1995	Pentium Pro	RISC chip, more stages in pipeline, on-board L2 cache.
1997	Pentium II	MMX instruction, dynamic execution, up to 450MHz.
1999	Pentium III	SSE instruction, up to 1+GHz.
2000	Pentium IV	Hyper pipeline, Rapid execution engine, Execution trace cache, 3.8+GHz.
2005	Pentium D	Dual core.

* adapted from A CPU History.

Course overview

This course is about computer organization and assembly languages, specifically for Intel architectures. You might wonder why learning assembly languages. After all, who will write assembly programs these days. Actually, people still write assembly for faster codes (compiler is not as smart as men yet), smaller codes (for devices with limited amount of memory such as mobile devices) and specific architectures (in which there are not even compilers, for example, early GPUs). With these in mind, other than the fundamentals about assembly programming, this course emphasizes on code optimization techniques on writing fast and small codes for specific architectures, here, Intel architectures.